Series C Funding Model Source: TechCrunch • $205M Capital Raise

Cornelis AI Chip Fabric & Funding Simulator

High-radix interconnect modeling, optical packet congestion, and silicon R&D distribution

Interactive AI Interconnect Topology

Real-time multi-tier Dragonfly+ / Clos fabric packet simulation

Topology: Radix-128 Clos
GPU Cluster Scale 16,384 GPUs
Per-Link Interconnect Bandwidth 800 Gbps
Target Switching Hop Latency 450 ns
Fabric Architecture Paradigm
Funding Allocation & Telemetry

$205M Series Funding deployment and training efficiency

Comm. Overhead
4.2%
All-Reduce idle penalty
Effective Throughput
842,050.0
TFLOPS sustained FP8
Bisection B/W
13.10
Petabits / sec total
Scaling Efficiency
95.8%
vs linear compute
$205.0M Strategic Capital Deployment $205,000,000 Total
R&D (ASIC/Optical) $123.0M (60%)
Foundry Scaling $61.5M (30%)
Operations / GTM $20.5M (10%)
Fabric Architecture Benchmark Comparison
Architecture Collective Latency Loss Recovery Simulated Overhead
Omni-Path (Cornelis) Cut-Through / Hardware Packet-level Dispersal 4.2%
InfiniBand NDR Credit-based Flow Go-Back-N Retransmit 5.8%
Ultra Ethernet (RoCEv2) PFC / ECN Congestion Selective ACK Retransmit 8.9%
State persists locally in real time. Download full cluster matrix and telemetry below.
Enjoy this tool? Build your own with Super