Windows AMD Driver Shim • PyTorch 2.3 • llama.cpp

CUDA-to-ROCm Bridge Dispatch Inspector

Inspect and verify NVIDIA CUDA DLL translation shims routing into AMD Windows MIOpen, rocBLAS, and hipSOLVER runtimes. Audit convolution gradients, kernel offload buffers, and catch silent numerical drift before hardware deployment.

Kernel & Hardware Config

Target Settings

Target GPU Architecture Loads ROCm ISA target, wave sizes (wave32 vs wave64), and memory layout. Workload Preset

Data Precision Batch / Seq Dim

CPU Reference Diff Check
Compare tensor output with CPU PyTorch

Strict SDPA Fail Trap
Trap silent wrong outputs as UNSUPPORTED

Mapped Exports 74 / 268 cuDNN v8 DLL Shim

Max Relative L1 Diff 4.12e-7 vs CPU PyTorch

Memory Footprint 1.42 GB VRAM + Compute Buf

Dispatch Status PASS Zero Nan / Correct

Active Dispatch Stream: PyTorch 2.3 Conv2d AMD RX 9060 XT (RDNA 4)

PyTorch Host F.conv2d fwd/bwd

→

nvcuda.dll / cuDNN cudnnConvolution*

→

Bridge Shim Layout NCHW → MIOpen

→

ROCm / MIOpen miopenConvolution*

CUDA API Entry	AMD ROCm Translation Target	Subsystem	Status	Measured Drift	Notes & Traps

Strict Integrity Policy: Any operation returning unverified or corrupt numerical tensors (e.g. PyTorch SDPA without flash-attention GEMM parity) is trapped immediately as UNSUPPORTED instead of silently returning garbage tensors to downstream loss functions.

cuDNN v8 to MIOpen Translation Architecture

Native Windows AMD ROCm support relies on dynamic translation of standard NVIDIA cuDNN/CUDA exports. Rather than compiling source code with HIP-Clang, Windows binaries dynamically load cudnn64_8.dll and nvcuda.dll.

Descriptor Transposition: Maps cudnnTensorDescriptor_t to miopenTensorDescriptor_t with explicit memory stride alignment.
Forward & Backward Gradients: Computes input gradients via miopenConvolutionBackwardData and weight filters via miopenConvolutionBackwardWeights.
Algorithm Workspace Search: Allocates temporary device buffers for MIOpen GEMM/Winograd convolution algorithms.

Silent Corruption vs. Unsupported Trapping

A common hazard in GPU translation layers is silent corruption—where kernels report success (return code 0) but produce corrupted or zero-filled output tensors.

PyTorch SDPA Bug: Scaled Dot-Product Attention often returns uninitialized tensors without throwing exceptions. This bridge shims it to UNSUPPORTED to force fallback.
CUDA Graph Warmup: Emulates cudaGraphLaunch and node capture by recording stream dependencies into native ROCm HIP graph representations.
llama.cpp Offloading: Bypasses proprietary PTX 8.4 metadata by intercepting cuLaunchKernelEx and passing pre-compiled RDNA HIP binaries.