US Memory Fab Capacity & Supply Chain Planner

Fab Specifications Live Update

Strategic Presets

Wafer Starts Capacity 120 K wpm

20 K wpm (Pilot) 250 K (Giga-scale)

Cleanroom & Tooling Capex $15.5 B

$3.0 B $35.0 B

Target Yield Rate 88 %

60% (Ramp-up) 98% (Mature)

Domestic Substrate Share 35 %

10% (Offshore dep.) 90% (Near-autarky)

Context: Prompted by TechCrunch reports concerning discussions between SK Hynix and Intel for US memory chip manufacturing cooperation, modeling HBM/DRAM packaging and integration.

Annual Memory Output

1845.6Tb

Effective usable DRAM / HBM silicon

Est. Jobs Created

4200positions

Process engineers, fab & packaging tech

Supply Security Score

78/ 100

Domestic resilience index

Interactive Supply Chain Flow Topology Throughput: 105.6 K Good Wpm