Fab Capacity & TSV Config
Total Monthly Wafer Starts
125,000
HBM Fab Wafer Allocation
24%
HBM Stack Architecture
DRAM Die Front-End Yield
88.0%
Advanced TSV Stacking Yield
91.0%
Pricing & Packaging Economics
Raw Wafer Cleanroom Cost
$1,650
TSV Packaging Adder / Stack
$85
Commodity DRAM ASP ($/GB)
$0.38
HBM3E / HBM4 ASP ($/GB)
$2.65
HBM Monthly Revenue
$894.2M
30,000 Wafers Dedicated
Standard DRAM Revenue
$612.8M
95,000 Commodity Wafers
Blended Gross Margin
54.6%
HBM Margin: 64.2%
Wafer Rev Multiplier
4.1x
HBM vs Standard Wafer Value
300mm Wafer Die Map (HBM Matrix)
DPW: 520 | 458 Good
Good Die
TSV Defect
Edge Loss
TSV Micro-Stack Architecture
12-Hi 36GB Stack
PACKAGE INTERPOSER (2.5D SILICON)
Net Good Stacks / Mo: 312,450 units
Unit Economics & Fab Throughput Breakdown
Monthly Run Rate
| Segment Metric | Standard DDR5 Memory | HBM3E / HBM4 AI Stack | Delta / Premium |
|---|---|---|---|
| Wafer Starts / Month | 95,000 Wafers | 30,000 Wafers | 24.0% Fab Capacity |
| Die Size & TSV Overhead | 74 mm² (Standard) | 118 mm² (+59% TSV Keep-out) | +1.60x Silicon Area |
| Gross Revenue / Wafer | $6,450 | $29,807 | +362% (+4.1x) |
| Cost per Finished Wafer/Stack | $1,650 | $10,670 | Base + Packaging Adder |
| Segment Gross Profit | $456.0M (74.4% GM) | $574.1M (64.2% GM) | $1,030.1M Combined |
Sensitivity Matrix: HBM ASP ($/GB) vs. Total Combined Revenue ($M)
Yield Swept