Lithography Physics & Geopolitical Chokepoint Simulator

Optical Aerial Image & Silicon Microstate Simulation

Wavelength (λ): 13.5 nm (EUV)

Numerical Aperture (NA): 0.33

Process Factor (k1): 0.28

Patterning Passes: Single EUV

Overlay Drift Budget: 1.2 nm

Base Defect Density: 0.08 /cm²

Semiconductor Physics & Economic Yield Model

Critical Dimension (CD)

11.45 nm

Rayleigh Limit: CD = k1 × λ / NA

Wafer Die Yield

89.4%

Murphy-Poisson Yield Model

Relative Wafer Cost

1.00x

Mask passes & defect penalty

Process Complexity

Low (1-Step Exposure)

Mask align layers: 1

Resolution Limit

11.45 nm

Single-pass pitch boundary

Chokepoint Status

ASML Monopolistic EUV Route

Export Control Regulated

Physics Insight: Rayleigh Wavelength Chokepoint

Single-exposure 13.5nm EUV achieves sub-12nm resolution directly without overlay cascading. 193nm DUV requires SAQP (4 mask passes + spacers), causing exponential yield collapse due to sub-nanometer overlay drift.

ASML Sole-Source Supply Chain Dependencies

Zeiss (Oberkochen, Germany) Mo/Si Bragg Multilayer Mirrors (sub-atom roughness)

Trumpf (Ditzingen, Germany) 40kW Industrial CO2 Pulsed Laser Amplifiers

Cymer / ASML (San Diego, USA) 50,000/sec Molten Tin Droplet LPP Source

VDL / ASML (Veldhoven, Netherlands) Sub-nanometer Vacuum Stage Mechatronics